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1GB (128M x 72) Low Profile Registered DDR DIMM based on stacked 128Mx4 DDR SDRAM
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JEDEC Standard 184-pin dual in-line memory module (DIMM)
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Error Check Correction (ECC) Capability
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Registered inputs with one-clock delay
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Phase-lock loop (PLL) clock driver to reduce loading
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2.5V +/- 0.2V VDD and VDDQ Power supply
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All inputs and outputs are compatible with SSTL_2 interface
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Fully differential clock operations (CK & /CK) with 100MHz/125MHz/133MHz
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Programmable CAS Latency 2 / 2.5 supported
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Programmable Burst Length 2 / 4 / 8 with both sequential and interleave mode
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tRAS Lock-out function supported
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Internal four bank operations with single pulsed RAS
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Auto refresh and self refresh supported
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8192 refresh cycles / 64ms
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Item fully tested guarantee against DOA
